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IIR

于 2018-12-28 发布

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说明：归一化后截止频率为0.2的数字低通滤波器，并且能有效滤掉工频干扰，使心电信号有效表达信息。(The normalized digital low-pass filter with a cutoff frequency of 0.2, and can effectively filter out power frequency interference, so that the ECG signal can effectively express information.)

文件列表：

IIR, 0 , 2018-12-28
IIR\Siconpicture.m, 1040 , 2018-10-09
IIR\study3_answer.m, 1071 , 2018-12-18
IIR\study3_x.m, 400 , 2018-12-18

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SortN
THE FASTEST WAY TO SORT N NUMBERS sortN library

2011-05-13 02:28:58下载

积分：1
moxing
基本PV模型，需改进根据T，G,V可输出I-U,U-P曲线(basic PV ，improvemention is needed)

2013-08-05 17:38:11下载

积分：1
Regression-prediction
一个用于离散信号时间自动回归预测的matlab程序(A discrete signal time automatically regression prediction matlab program)

2013-01-15 14:41:57下载

积分：1
ungkqhgv
有小波分析的盲信号处理，采用波束成形技术的BER计算，采用偏最小二乘法，多元数据分析的主分量分析投影，部分实现了追踪测速迭代松弛算法，欢迎大家下载学习。( There Wavelet Analysis Blind Signal Processing, By applying the beam forming technology of BER Partial least squares method, Principal component analysis of multivariate data analysis projection, Partially achieved tracking speed iterative relaxation algorithm, Welcome to download the study.)

2016-04-01 23:45:42下载

积分：1
Reversible-New-Code
Reversible data / Logo Image Hiding using DCT.... Application has design using UI..

2014-12-25 16:07:29下载

积分：1
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IHS变换域的遥感图像NSCT融合算法石爱业马艳军黄凤辰徐立中河海大学学报(自然科学版) 2008-11-25 期刊(NSCT ihs transform domain of remote sensing image fusion algorithm stone love industry Ma Yanjun Huang Fengchen Xu Lizhong journal of hohai university (natural science edition) 2008-11-25 journals)

2013-12-15 15:52:16下载

积分：1
DV-hop
dv-hop定位算法，用最小二乘法实现节点的定位。(Dv-hop localization algorithm, using the least square method realize the positioning of the node. )

2012-04-24 12:24:07下载

积分：1
57410
super pixel image registration

2014-08-13 01:31:08下载

积分：1
ABAQUS_Standard_UMAT_workexample
ABAQUS/Standard 用户材料子程序实例(A standard ABAQUS UMAT workexample.)

2013-10-18 19:02:46下载

积分：1
dual_core
This example application shows you how to use Real-Time Workshop Embedded Coder to target a dual core Blackfin microprocessor. The complete build is managed by a template makefile and control over the memory regions is provided by custom storage classes. The example imposes a top level architecture on the model to define the split of model code between the two cores. This document describes a complete run-through of the model from Simulink simulation to code simulation using VisualDSP. I think it will take about 1 hour to go through the example once you have VisualDSP installed.

2010-01-09 16:47:58下载

积分：1

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