hdmi_demo

代码说明：

  hdmi 视频编解码输入输出模块，verilog实现(hdmi encoder and decoder in verilog.)

文件列表：

hdmi_demo
.........\rtl
.........\...\common
.........\...\......\debnce.v,3700,2008-07-24
.........\...\......\DRAM16XN.v,1667,2008-07-24
.........\...\......\srldelay.v,2931,2008-07-24
.........\...\......\synchro.v,3890,2008-07-24
.........\...\......\timing.v,8425,2008-07-24
.........\...\hdmi_demo.v,18216,2008-07-24
.........\...\logofly
.........\...\.......\autopilot.v,10272,2008-07-24
.........\...\.......\cursor_pair.v,5809,2008-07-24
.........\...\.......\s3a_logo.v,36831,2008-07-24
.........\...\rx
.........\...\..\chnlbond.v,5887,2008-07-24
.........\...\..\dcminit.v,4701,2008-07-24
.........\...\..\decode.v,15025,2008-07-24
.........\...\..\hdmi_decoder.v,7465,2008-07-24
.........\...\..\phsaligner.v,18475,2008-07-24
.........\...\..\tmds_1c_1to10.v,8825,2008-07-24
.........\...\tx
.........\...\..\encode.v,9495,2008-07-24
.........\...\..\hdmi_encoder.v,5249,2008-07-24
.........\...\..\serdes_4b_10to1_fifo.v,14335,2008-07-24