28377xD_SCI

代码说明：

  一核启动把权限交给二核，二核使用SCI接口发送信息。(Two core uses SCI interface)

文件列表：

lab19_scic_RS485_CPU1\.ccsproject, 547 , 2019-07-25
lab19_scic_RS485_CPU1\.cproject, 25447 , 2019-06-11
lab19_scic_RS485_CPU1\.launches\lab19_scic_RS485.launch, 7736 , 2019-05-07
lab19_scic_RS485_CPU1\.project, 1057 , 2019-06-11
lab19_scic_RS485_CPU1\.settings\org.eclipse.cdt.codan.core.prefs, 62 , 2016-03-13
lab19_scic_RS485_CPU1\.settings\org.eclipse.cdt.debug.core.prefs, 123 , 2016-03-13
lab19_scic_RS485_CPU1\.settings\org.eclipse.core.resources.prefs, 307 , 2019-06-11
lab19_scic_RS485_CPU1\cmd\2837xD_FLASH_lnk_cpu1.cmd, 6066 , 2016-04-20
lab19_scic_RS485_CPU1\cmd\2837xD_RAM_lnk_cpu1.cmd, 3795 , 2016-04-20
lab19_scic_RS485_CPU1\cmd\F2837xD_Headers_nonBIOS_cpu1.cmd, 12970 , 2016-04-20
lab19_scic_RS485_CPU1\Debug\ccsObjs.opt, 485 , 2019-07-25
lab19_scic_RS485_CPU1\Debug\cmd\subdir_rules.mk, 289 , 2019-07-25
lab19_scic_RS485_CPU1\Debug\cmd\subdir_vars.mk, 385 , 2019-07-25
lab19_scic_RS485_CPU1\Debug\lab19_scic_RS485_CPU1.map, 70205 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\lab19_scic_RS485_CPU1.out, 440152 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\lab19_scic_RS485_CPU1_linkInfo.xml, 233134 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\makefile, 5195 , 2019-07-25
lab19_scic_RS485_CPU1\Debug\objects.mk, 272 , 2019-07-25
lab19_scic_RS485_CPU1\Debug\source\Example_2837xSSci_Echoback.obj, 153799 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\Example_2837xSSci_Echoback.pp, 9347 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\F2837xD_CodeStartBranch.obj, 1853 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\F2837xD_DefaultISR.obj, 56519 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\F2837xD_DefaultISR.pp, 8398 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\F2837xD_GlobalVariableDefs.obj, 488971 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\F2837xD_GlobalVariableDefs.pp, 6407 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\F2837xD_Gpio.obj, 164436 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\F2837xD_Gpio.pp, 8044 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\F2837xD_Ipc.obj, 16723 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\F2837xD_Ipc.pp, 8127 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\F2837xD_Ipc_Driver_Util.obj, 153907 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\F2837xD_Ipc_Driver_Util.pp, 6767 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\F2837xD_PieCtrl.obj, 22499 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\F2837xD_PieCtrl.pp, 8221 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\F2837xD_PieVect.obj, 45625 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\F2837xD_PieVect.pp, 8221 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\F2837xD_SysCtrl.obj, 88415 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\F2837xD_SysCtrl.pp, 8221 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\F2837xD_usDelay.obj, 1550 , 2019-06-28
lab19_scic_RS485_CPU1\Debug\source\subdir_rules.mk, 7567 , 2019-07-25
lab19_scic_RS485_CPU1\Debug\source\subdir_vars.mk, 2712 , 2019-07-25
lab19_scic_RS485_CPU1\Debug\sources.mk, 2031 , 2019-07-25
lab19_scic_RS485_CPU1\include\F2837xD_adc.h, 48649 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_Adc_defines.h, 1304 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_analogsubsys.h, 6866 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_Can_defines.h, 4767 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_cla.h, 13251 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_Cla_defines.h, 5751 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_Cla_typedefs.h, 3384 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_cmpss.h, 11589 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_cputimer.h, 4008 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_cputimervars.h, 2880 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_dac.h, 4527 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_dcsm.h, 21821 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_defaultisr.h, 13227 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_device.h, 5580 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_dma.h, 6291 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_Dma_defines.h, 3738 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_ecap.h, 8144 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_emif.h, 11992 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_Emif_defines.h, 9906 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_epwm.h, 55659 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_EPwm_defines.h, 5350 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_epwm_xbar.h, 53242 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_eqep.h, 12184 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_Examples.h, 13745 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_flash.h, 14851 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_GlobalPrototypes.h, 11869 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_gpio.h, 248495 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_Gpio_defines.h, 2340 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_i2c.h, 9156 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_I2c_defines.h, 4861 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_input_xbar.h, 4633 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_ipc.h, 17448 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_Ipc_defines.h, 1331 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_Ipc_drivers.h, 23885 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_mcbsp.h, 12814 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_memconfig.h, 53605 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_nmiintrupt.h, 6286 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_output_xbar.h, 59758 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_piectrl.h, 36777 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_pievect.h, 19567 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_Pie_defines.h, 1278 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_sci.h, 9112 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_sci_io.h, 1240 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_sdfm.h, 21727 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_sdfm_drivers.h, 16889 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_spi.h, 6950 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_struct.h, 1514 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_SWPrioritizedIsrLevels.h, 472573 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_sysctrl.h, 87431 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_SysCtrl_defines.h, 1140 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_Systick_defines.h, 1835 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_upp.h, 16968 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_Upp_defines.h, 1511 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_xbar.h, 17047 , 2016-04-20
lab19_scic_RS485_CPU1\include\F2837xD_xint.h, 4069 , 2016-04-20
lab19_scic_RS485_CPU1\include\F28x_Project.h, 853 , 2016-04-20
lab19_scic_RS485_CPU1\include\SFO_V8.h, 2866 , 2016-04-20
lab19_scic_RS485_CPU1\source\Example_2837xSSci_Echoback.c, 3359 , 2019-06-11
lab19_scic_RS485_CPU1\source\F2837xD_CodeStartBranch.asm, 3233 , 2016-04-20