FPGA_homewrk2
于 2018-05-07 发布
文件大小:135KB
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代码说明:
设计一个能求出一个32bit字中两个相邻0之间最大间隙的电路。完成HDL设计及testbench描述,给出综合后的时序仿真结果。文档报告(Design a circuit that can find the maximum gap between two adjacent 0 in a 32bit word. The HDL design and testbench description are completed, and the result of comprehensive simulation is given. Document report)
文件列表:
FPGA_homewrk2.docx, 150320 , 2018-05-07
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