ADI_HDMI

代码说明：

  从FPGA输出到HDMI Tx的verilog 模块。实现完整HDMI图像输出功能。(FPGA output to HDMI Tx module in verilog)

文件列表：

ADI_HDMI
........\Source
........\......\axi_hdmi_tx.v,12202,2016-12-23
........\......\axi_hdmi_tx_constr.xdc,994,2016-12-23
........\......\axi_hdmi_tx_core.v,20516,2016-12-23
........\......\axi_hdmi_tx_es.v,5196,2016-12-23
........\......\axi_hdmi_tx_vdma.v,7789,2016-12-23
........\......\system_top.v,7140,2016-12-23