ethernet_udp_ep4c_ok_final

代码说明：

  用ALTERA的FPGA实现UDP通信源代码(FPGA UDP)

文件列表：

ctl_recev.v,983,2014-07-07
ctl_trans.v,1300,2014-07-07
cycle.v,557,2015-01-11
cycle.v.bak,557,2015-01-11
ethernet.v,11027,2015-01-11
ethernet.v.bak,10964,2014-07-07
ethernet_top.qpf,1292,2014-07-07
ethernet_top.qsf,6078,2015-01-11
ethernet_top.qws,786,2015-04-06
ethernet_top.v,8531,2015-01-11
ethernet_top.v.bak,4979,2014-07-07
init.v,14539,2014-07-07
led.v,1758,2014-07-07
pll.ppf,565,2014-07-07
pll.qip,436,2014-07-07
pll.v,18833,2014-07-07
PLLJ_PLLSPE_INFO.txt,266,2015-01-11
pll_bb.v,14357,2014-07-07
pll_inst.v,118,2014-07-07
recev.v,6191,2014-07-07
rx_fifo.qip,364,2014-07-07
rx_fifo.v,7145,2014-07-07
rx_fifo_bb.v,5987,2014-07-07
rx_fifo_inst.v,272,2014-07-07
rx_fifo_ram.qip,383,2014-07-07
rx_fifo_ram.v,9617,2014-07-07
rx_fifo_ram_bb.v,7889,2014-07-07
rx_fifo_ram_inst.v,206,2014-07-07
rx_ram2rxfifo.v,5093,2014-07-07
top_pll.ppf,498,2015-01-11
top_pll.qip,452,2015-01-11
top_pll.v,17457,2015-01-11
top_pll_bb.v,13208,2015-01-11
top_pll_inst.v,108,2015-01-11
trans.v,5307,2014-07-07
transss.v,22182,2015-01-11
transss.v.bak,22184,2015-01-11
tse.bsf,22839,2014-07-07
tse.cmp,5329,2014-07-07
tse.qip,12337,2014-07-07
tse.sip,27516,2014-07-07
tse.spd,27341,2014-07-07
tse.v,16446,2014-07-07
tx_checksum.v,19239,2015-01-11
tx_checksum.v.bak,18794,2014-07-07
tx_fifo.qip,364,2014-07-07
tx_fifo.v,7145,2014-07-07
tx_fifo_bb.v,5987,2014-07-07
tx_fifo_inst.v,272,2014-07-07
tx_ram_fifo.qip,383,2014-07-07
tx_ram_fifo.v,9611,2014-07-07
tx_ram_fifo_bb.v,7881,2014-07-07
tx_ram_fifo_inst.v,206,2014-07-07
程序使用说明.txt,831,2014-07-08