QAM_verilog

代码说明：

  基于FPGA的16QAM，用verilog编写，其中DDS为自己编写，含设计文件和testbench。已通过moldesim软件仿真。 (FPGA-based 16QAM, with verilog writing, including DDS for their preparation, including design files and testbench. Simulation software has been through moldesim.)

文件列表：

QAM_verilog
...........\mul2.v,1158,2015-03-31
...........\mydds.v,2692,2015-04-03
...........\QAM.v,619,2015-04-03
...........\QAM_MOD.v,2524,2015-04-09
...........\QAM_TB.v,340,2015-04-03
...........\readme.txt,393,2015-04-22
...........\SEQ.v,1145,2015-04-03