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filter-design

于 2020-12-02 发布 文件大小:404KB
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代码说明:

  MBD-FPGA数字滤波器设计基本流程,基于DSP builder(MBD-FPGA basic process of digital filter design)

文件列表:

filter design
.............\AutoGentorCoSimulation.mdl,699042,2011-10-26
.............\compile_and_launch.tcl,5108,2011-10-26
.............\hdlsrc
.............\......\filter_Hf2.v,69040,2011-10-26
.............\......\filter_Hf2_compile.do,29,2011-10-26
.............\......\filter_Hf2_generatehdl.m,1411,2011-10-26
.............\......\htm" target=_blank>transcript,3413,2011-10-27
.............\......\vsim.wlf,131072,2011-10-26
.............\......\work
.............\......\....\filter_@hf2
.............\......\....\...........\verilog.prw,71499,2011-10-27
.............\......\....\...........\verilog.psm,518056,2011-10-27
.............\......\....\...........\_primary.dat,57503,2011-10-27
.............\......\....\...........\_primary.dbs,72185,2011-10-27
.............\......\....\...........\_primary.vhd,14849,2011-10-27
.............\......\....\htm" target=_blank>_info,401,2011-10-27
.............\......\....\_temp
.............\......\....\_vmake,26,2011-10-27
.............\MBD-FPGA数字滤波器设计基本流程.pdf,155189,2011-10-26
.............\T1.fda,6332,2011-10-26
.............\TD2.mat,3324,2011-10-26
.............\TD3.mat,2306,2011-10-26
.............\Test1.m,436,2011-10-26
.............\Test2.m,746,2011-10-26
.............\Test3.m,1292,2011-10-26
.............\Test4.m,1338,2011-10-26
.............\Tm1.mdl,30660,2011-10-26

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