MVB_test
代码说明:
此功能是实现曼彻斯特编码的Verilog代码,经过在xilinx sp6上实际运行证实可行。(This function is to achieve the Manchester code Verilog code, through the Xilinx SP6 actual operation proved.)
文件列表:
MVB_test
........\clkdiv.cmd_log,255,2014-11-01
........\clkdiv.spl,77,2014-11-01
........\clkdiv.sym,879,2014-11-01
........\clkdiv.v,845,2014-11-01
........\edkBmmFile.bmm,626,2014-11-02
........\edkBmmFile_bd.bmm,1357,2014-11-02
........\ipcore_dir
........\iseconfig
........\.........\MVB_test.projectmgr,8525,2014-11-02
........\.........\MVB_test.xreport,20820,2014-11-02
........\.........\my_system.xreport,20808,2014-11-01
........\Mancheste.cmd_log,270,2014-11-01
........\Mancheste.spl,143,2014-11-01
........\Mancheste.sym,2830,2014-11-01
........\Mancheste.v,811,2014-11-01
........\md.v,2561,2014-11-01
........\me.cmd_log,177,2014-11-02
........\me.tfi,173,2014-11-02
........\me.v,2634,2014-11-01
........\MVB,0,2014-11-01
........\MVB.ucf,1252,2014-11-02
........\mvb_test.bgn,11284,2014-11-02
........\mvb_test.bit,464290,2014-11-02
........\MVB_test.bld,5216,2014-11-02
........\MVB_test.cmd_log,7682,2014-11-02
........\mvb_test.drc,4754,2014-11-02
........\MVB_test.gise,21287,2014-11-02
........\MVB_test.jhd,137,2014-11-02
........\MVB_test.lso,6,2014-11-02
........\MVB_test.ncd,1147828,2014-11-02
........\MVB_test.ngc,1353800,2014-11-02
........\MVB_test.ngd,4346351,2014-11-02
........\MVB_test.ngr,1361711,2014-11-02
........\MVB_test.pad,13949,2014-11-02
........\MVB_test.par,13337,2014-11-02
........\MVB_test.pcf,692,2014-11-02
........\MVB_test.prj,183,2014-11-02
........\MVB_test.ptwx,17840,2014-11-02
........\MVB_test.sch,9582,2014-11-02
........\MVB_test.schbak,9652,2014-11-02
........\MVB_test.schcmd,46,2014-11-02
........\MVB_test.stx,0,2014-11-02
........\MVB_test.syr,208178,2014-11-02
........\MVB_test.twr,4314,2014-11-02
........\MVB_test.twx,21486,2014-11-02
........\MVB_test.unroutes,2572,2014-11-02
........\MVB_test.ut,553,2014-11-02
........\MVB_test.vf,2464,2014-11-02
........\MVB_test.xise,38639,2014-11-02
........\MVB_test.xpi,46,2014-11-02
........\MVB_test.xst,1074,2014-11-02
........\MVB_test_bitgen.xwbt,199,2014-11-02
........\MVB_test_envsettings.html,13352,2014-11-02
........\MVB_test_guide.ncd,1147828,2014-11-02
........\MVB_test_map.map,12033,2014-11-02
........\MVB_test_map.mrp,322562,2014-11-02
........\MVB_test_map.ncd,561347,2014-11-02
........\MVB_test_map.ngm,4616515,2014-11-02
........\MVB_test_map.xrpt,25664,2014-11-02
........\MVB_test_ngdbuild.xrpt,12556,2014-11-02
........\MVB_test_pad.csv,13981,2014-11-02
........\MVB_test_pad.txt,65042,2014-11-02
........\MVB_test_par.xrpt,154458,2014-11-02
........\MVB_test_summary.html,20219,2014-11-02
........\MVB_test_summary.xml,409,2014-11-02
........\MVB_test_usage.xml,108902,2014-11-02
........\MVB_test_xst.xrpt,15850,2014-11-02
........\my_system
........\.........\bitinit.log,5651,2014-11-02
........\.........\bootloops
........\.........\.........\microblaze_0.elf,659,2014-11-01
........\.........\clock_generator_0.log,418,2014-11-02
........\.........\data
........\.........\....\my_system.ucf,516,2014-11-01
........\.........\etc
........\.........\...\bitgen.ut,66,2014-11-01
........\.........\...\bitgen.ut.virtex5,66,2014-11-01
........\.........\...\download.cmd,115,2014-11-01
........\.........\...\fast_runtime.opt,2794,2014-11-01
........\.........\...\fast_runtime.opt.virtex5,2794,2014-11-01
........\.........\...\my_system.filters,9814,2014-11-02
........\.........\...\my_system.gui,15418,2014-11-02
........\.........\hdl
........\.........\...\elaborate
........\.........\...\.........\bram_block_0_elaborate_v1_00_a
........\.........\...\.........\..............................\hdl
........\.........\...\.........\..............................\...\verilog
........\.........\...\.........\..............................\...\.......\bram_block_0_elaborate.v,52832,2014-11-01
........\.........\...\.........\clock_generator_0_v4_03_a
........\.........\...\.........\.........................\hdl
........\.........\...\.........\.........................\...\vhdl
........\.........\...\.........\.........................\...\....\clock_generator.vhd,38886,2014-11-02
........\.........\...\.........\lmb_bram_elaborate_v1_00_a
........\.........\...\.........\..........................\hdl
........\.........\...\.........\..........................\...\verilog
........\.........\...\.........\..........................\...\.......\lmb_bram_elaborate.v,8512,2014-11-02
........\.........\...\my_system.v,162399,2014-11-02
........\.........\...\my_system_bram_block_0_wrapper.v,1652,2014-11-01
........\.........\...\my_system_clock_generator_0_wrapper.vhd,3404,2014-11-02
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