LVDS-application-Verilog-HDL-code

代码说明：

  LVDS的应用的Verilog HDL例子程序(LVDS example of the application procedures for the Verilog HDL)

文件列表：

sim
...\comp_altera_lib.do,276,2003-01-21
...\comp_gate.do,217,2003-01-23
...\diff_io_top.vo,75894,2003-01-23
...\diff_io_top_v.sdo,52274,2003-01-23
...\gate_sim.do,1515,2003-01-23
...\stratix
...\.......\@p@r@i@m_@d@f@f@e
...\.......\.................\verilog.asm,1448,2003-01-23
...\.......\.................\_primary.dat,1262,2003-01-23
...\.......\.................\_primary.vhd,78,2003-01-23
...\.......\and1
...\.......\....\verilog.asm,1984,2003-01-23
...\.......\....\_primary.dat,194,2003-01-23
...\.......\....\_primary.vhd,170,2003-01-23
...\.......\and16
...\.......\.....\verilog.asm,5465,2003-01-23
...\.......\.....\_primary.dat,825,2003-01-23
...\.......\.....\_primary.vhd,212,2003-01-23
...\.......\b17mux21
...\.......\........\verilog.asm,2810,2003-01-23
...\.......\........\_primary.dat,235,2003-01-23
...\.......\........\_primary.vhd,324,2003-01-23
...\.......\b5mux21
...\.......\.......\verilog.asm,2802,2003-01-23
...\.......\.......\_primary.dat,234,2003-01-23
...\.......\.......\_primary.vhd,319,2003-01-23
...\.......\bmux21
...\.......\......\verilog.asm,2802,2003-01-23
...\.......\......\_primary.dat,233,2003-01-23
...\.......\......\_primary.vhd,320,2003-01-23
...\.......\dffe
...\.......\....\verilog.asm,9167,2003-01-23
...\.......\....\_primary.dat,915,2003-01-23
...\.......\....\_primary.vhd,342,2003-01-23
...\.......\latch
...\.......\.....\verilog.asm,7153,2003-01-23
...\.......\.....\_primary.dat,860,2003-01-23
...\.......\.....\_primary.vhd,301,2003-01-23
...\.......\mux21
...\.......\.....\verilog.asm,5048,2003-01-23
...\.......\.....\_primary.dat,423,2003-01-23
...\.......\.....\_primary.vhd,258,2003-01-23
...\.......\m_cntr
...\.......\......\verilog.asm,7738,2003-01-23
...\.......\......\_primary.dat,794,2003-01-23
...\.......\......\_primary.vhd,406,2003-01-23
...\.......\nmux21
...\.......\......\verilog.asm,2706,2003-01-23
...\.......\......\_primary.dat,197,2003-01-23
...\.......\......\_primary.vhd,260,2003-01-23
...\.......\n_cntr
...\.......\......\verilog.asm,6835,2003-01-23
...\.......\......\_primary.dat,755,2003-01-23
...\.......\......\_primary.vhd,406,2003-01-23
...\.......\scale_cntr
...\.......\..........\verilog.asm,11753,2003-01-23
...\.......\..........\_primary.dat,1465,2003-01-23
...\.......\..........\_primary.vhd,646,2003-01-23
...\.......\stratix_asynch_io
...\.......\.................\verilog.asm,18854,2003-01-23
...\.......\.................\_primary.dat,2197,2003-01-23
...\.......\.................\_primary.vhd,612,2003-01-23
...\.......\stratix_asynch_lcell
...\.......\....................\verilog.asm,72858,2003-01-23
...\.......\....................\_primary.dat,6638,2003-01-23
...\.......\....................\_primary.vhd,1013,2003-01-23
...\.......\stratix_crcblock
...\.......\................\verilog.asm,2513,2003-01-23
...\.......\................\_primary.dat,273,2003-01-23
...\.......\................\_primary.vhd,384,2003-01-23
...\.......\stratix_io
...\.......\..........\verilog.asm,28660,2003-01-23
...\.......\..........\_primary.dat,3524,2003-01-23
...\.......\..........\_primary.vhd,1692,2003-01-23
...\.......\stratix_io_register
...\.......\...................\verilog.asm,20225,2003-01-23
...\.......\...................\_primary.dat,2007,2003-01-23
...\.......\...................\_primary.vhd,611,2003-01-23
...\.......\stratix_jtag
...\.......\............\verilog.asm,5371,2003-01-23
...\.......\............\_primary.dat,448,2003-01-23
...\.......\............\_primary.vhd,745,2003-01-23
...\.......\stratix_lcell
...\.......\.............\verilog.asm,12945,2003-01-23
...\.......\.............\_primary.dat,1515,2003-01-23
...\.......\.............\_primary.vhd,1584,2003-01-23
...\.......\stratix_lcell_register
...\.......\......................\verilog.asm,23219,2003-01-23
...\.......\......................\_primary.dat,2762,2003-01-23
...\.......\......................\_primary.vhd,835,2003-01-23
...\.......\stratix_lvds_receiver
...\.......\.....................\verilog.asm,24347,2003-01-23
...\.......\.....................\_primary.dat,2570,2003-01-23
...\.......\.....................\_primary.vhd,543,2003-01-23
...\.......\stratix_lvds_rx_parallel_register
...\.......\.................................\verilog.asm,16180,2003-01-23
...\.......\.................................\_primary.dat,2648,2003-01-23
...\.......\.................................\_primary.vhd,497,2003-01-23
...\.......\stratix_lvds_transmitter