-
JSXXXT
将老师的信息更好的管理，提高工作效率，同时避免人工管理的错误，所以制作了老师信息管理系统(Better teacher management, and improve work efficiency, while avoiding the errors of manual management, so the production the teacher information management system)
- 2013-03-29 22:01:28下载
- 积分：1
-
EV-charge
电动汽车有序充电 实现住宅小区内电动汽车有序充电优化模式(ev charge)
- 2021-03-27 19:59:12下载
- 积分：1
-
uav-auto-control
数学建模论文_无人机自主飞行航迹规划问题，这篇文章还不错，内容比较全面，可以拿来参考(Mathematical modeling of paper _ UAV autonomous flight path planning problem, the article is also good, the content is more comprehensive, can be used to reference)
- 2015-09-03 12:16:29下载
- 积分：1
-
430-design-schematics
430设计原理图 适用于初学者 本着实验方便而设计各种模块接口(430 design schematics for beginners in line with a variety of experiments designed to facilitate module interface)
- 2013-08-26 10:54:45下载
- 积分：1
-
5
说明： 基于agent 的入侵检测系统，希望对大家有用(Agent-based intrusion detection system, in the hope that useful to everybody)
- 2008-08-05 16:20:48下载
- 积分：1
-
Room-management-system
数据库客房管理系统框架结构以及源代码，帮助人们实现客房管理。(Database management system room frame structure as well as the source code, to help people realize the guest room management.)
- 2012-11-20 17:23:06下载
- 积分：1
-
OFDM_cognitive
博士学位论文，详细探讨基于OFDM的认知无线电系统信道及频谱感知(Channel, spectrum, and waveform awareness in OFDM-based cognitive radio systems.pdf)
- 2010-03-12 14:00:19下载
- 积分：1
-
OPCHistoryDataSeverReaserch
OPC历史数据访问服务器的研究与开发硕士论文,对于学习了解OPC技术规范及开发基于OPC的工业实时历史数据库的应用软件有非常大的帮助.(Research and Development Thesis OPC Historical Data Access Server, learn about OPC technology for the development of applications based on software specifications and OPC industrial real-time historical database has a very big help.)
- 2014-04-12 17:37:55下载
- 积分：1
-
FPGA_homewrk2
设计一个能求出一个32bit字中两个相邻0之间最大间隙的电路。完成HDL设计及testbench描述，给出综合后的时序仿真结果。文档报告(Design a circuit that can find the maximum gap between two adjacent 0 in a 32bit word. The HDL design and testbench description are completed, and the result of comprehensive simulation is given. Document report)
- 2018-05-07 18:33:25下载
- 积分：1
-
Farrow-filter-error
用 Farrow 结构滤波器对并行采样信号进行时间误差校正, 通过 DSPBuilder 软件将设计的滤波器模型转化为硬
件语言, 利于 FPGA 实现(The Farrow filter is used to correct the time error of the parallel sampling signal, and the designed filter model is converted to hard by DSPBuilder software
Language, conducive to the realization of FPGA
)
- 2017-04-14 22:43:40下载
- 积分：1
