ppl
于 2010-05-04 发布
文件大小:19KB
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代码说明:
说明: 锁相电路是相位锁定环(Phase Locked Loop)的简称,主要由鉴相器、环路滤波、压控振荡器成 。主要是要掌握LabVIEW图形化编程特点,(PLL circuit is phase-locked loop (Phase Locked Loop) for short, mainly by the phase detector, loop filter, VCO into. Mainly to grasp the features of LabVIEW graphical programming,)
文件列表:
14.vi
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