▍1. DDR3读写测试
MIG IP控制DDR3读写测试,于MIG IP核用户接口时序较复杂,这里给出扩展接口模块用于进一步简化接口时序。(MIG IP controls DDR3 reading and writing tests, and the time sequence of MIG IP kernel user interface is more complex.)
MIG IP控制DDR3读写测试,于MIG IP核用户接口时序较复杂,这里给出扩展接口模块用于进一步简化接口时序。(MIG IP controls DDR3 reading and writing tests, and the time sequence of MIG IP kernel user interface is more complex.)