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QUARTUS-II
Quartus ii 入门基础 仅针对初学者 望各位童鞋们指导 呵呵 (Quartus ii entry basis only for beginners looking to guide their children' s shoes Oh you)
- 2011-08-01 22:13:25下载
- 积分：1
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SASX
Use of Kalman and EKF on two-phase permanent magnet synchronous motor of the state estimate CDCDCDCDCCC
- 2020-06-24 11:40:02下载
- 积分：1
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sdram verilog
sdram FPGA verilog设计 有源码有设计文档
- 2023-04-21 03:40:04下载
- 积分：1
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i2c_master_top
i2c core : i2c master top
- 2012-05-23 01:17:22下载
- 积分：1
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vedic 乘法器的 verilog 代码
这是古代vedic数学家设计的8 x 8 vedic乘法器的源代码旨。全加操作使用了全加法器。
- 2022-01-26 03:00:38下载
- 积分：1
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TLC5615 FPGA(EP2C08)
用Verilog硬件语言驱动TLC5615 DAC芯片,可输出方波,并且频率可调
- 2023-08-22 20:10:05下载
- 积分：1
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I2C
VHDL语言编写的I2C通信接口,可与单片机等MCU相连,只占用很少的引脚线完成数据的传输(Written in VHDL I2C communication interface, such as MCU and MCU can be connected, only takes a few lines to complete the data transmission pin)
- 2011-05-15 09:00:33下载
- 积分：1
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系统设计
说明： 基于无源蜂鸣器和矩阵按键的电子琴系统设计(design of Electronic Piano System Based on Passive Buzzer and Matrix Key)
- 2020-06-21 01:20:08下载
- 积分：1
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verilog rgb_yuv
AD8176的控制verilog编写，可实现RGB的自由切换，16通道进，9通道输出。
- 2022-01-22 16:34:08下载
- 积分：1
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PipelineSim
一个计算机原理课程设计的作业，5级流水线CPU，指令集到代码均为自己设计，有最终报告文档，组建说明，并行除法，16位字长，定长指令，Verilog源代码，顶层设计图。结构简单，冲突解决方式也很简单，代码量小。(A computer theory course design work, five pipelined CPU, instruction set to the code are design, the final report documents the formation of parallel division, 16-bit word length, fixed-length instructions, Verilog source code, top level design. Simple structure, conflict resolution is also very simple, a small amount of code.)
- 2012-06-24 22:19:14下载
- 积分：1
