-
乘法器,实现了乘法和除法的功能,能够进行32位的运算
乘法器,实现了乘法和除法的功能,能够进行32位的运算-Multiplier to achieve the functions of multiplication and division to carry out 32-bit computing
- 2022-03-24 02:44:07下载
- 积分:1
-
Uses Verilog the HDL design, obtains the realization basis on
the palm space int...
采用Verilog HDL设计,在掌宇智能开发板上得到实现
根据抢答器的原理,整个电路可划分为三部分:采样电路、门控电路和译码电路- Uses Verilog the HDL design, obtains the realization basis on
the palm space intelligence development board to snatch the answering
principle, the entire electric circuit may divide is three parts: The
sampling electric circuit, the gate control the electric circuit and
the decoding circuit
- 2022-03-16 23:36:15下载
- 积分:1
-
VHDL
vhdl 让你更加熟悉掌握这么硬件电路设计语言 非常清晰(vhdl)
- 2010-07-22 07:30:20下载
- 积分:1
-
urisc
自己用verilog编写的urisc程序,调试成功,压缩包里有仿真图像,值得学习参考。(Written in verilog urisc program debugging, simulation image compression bag, worth learning reference.)
- 2021-04-22 17:38:48下载
- 积分:1
-
Риторика_Зачетная работа
说明: access must be conf urr arr
- 2019-05-29 20:23:53下载
- 积分:1
-
CORDIC FPGA使用Verilog程序实现
cordic的verilog程序
用FPGA实现-CORDIC FPGA using the Verilog procedures realize
- 2022-05-29 16:40:15下载
- 积分:1
-
ethernet_tri_mode_rtl.tar
以太网控制器verilog,含有mac,mii接口(Ethernet controller verilog, containing mac, mii interface)
- 2007-12-19 23:51:08下载
- 积分:1
-
SZ-VHDL
系统数字逻辑电路设计方法以及示例的介绍,分析较好,有价值(System digital logic circuit design methods and introduce examples, analyze good and valuable)
- 2014-03-30 08:34:05下载
- 积分:1
-
用VHDL硬件描述语言开发的miniUART接口IP Core,用户可以将其嵌入到自己的FPGA模块中。...
用VHDL硬件描述语言开发的miniUART接口IP Core,用户可以将其嵌入到自己的FPGA模块中。-VHDL hardware description language developed by miniUART Interface IP Core, Users can be embedded into their own FPGA module.
- 2022-10-05 02:20:03下载
- 积分:1
-
占空比1:1的通用分频模块
占空比1:1的通用分频模块-1:1 generic-frequency module
- 2022-11-11 08:45:03下载
- 积分:1